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113 lines
4.3 KiB
C++
113 lines
4.3 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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using Tegra::Shader::VideoType;
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using Tegra::Shader::VmadShr;
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u32 ShaderIR::DecodeVideo(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const Node op_a =
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GetVideoOperand(GetRegister(instr.gpr8), instr.video.is_byte_chunk_a, instr.video.signed_a,
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instr.video.type_a, instr.video.byte_height_a);
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const Node op_b = [this, instr] {
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if (instr.video.use_register_b) {
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return GetVideoOperand(GetRegister(instr.gpr20), instr.video.is_byte_chunk_b,
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instr.video.signed_b, instr.video.type_b,
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instr.video.byte_height_b);
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}
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if (instr.video.signed_b) {
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const auto imm = static_cast<s16>(instr.alu.GetImm20_16());
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return Immediate(static_cast<u32>(imm));
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} else {
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return Immediate(instr.alu.GetImm20_16());
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}
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}();
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switch (opcode->get().GetId()) {
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case OpCode::Id::VMAD: {
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const bool result_signed = instr.video.signed_a == 1 || instr.video.signed_b == 1;
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const Node op_c = GetRegister(instr.gpr39);
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Node value = SignedOperation(OperationCode::IMul, result_signed, NO_PRECISE, op_a, op_b);
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value = SignedOperation(OperationCode::IAdd, result_signed, NO_PRECISE, value, op_c);
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if (instr.vmad.shr == VmadShr::Shr7 || instr.vmad.shr == VmadShr::Shr15) {
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const Node shift = Immediate(instr.vmad.shr == VmadShr::Shr7 ? 7 : 15);
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value =
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SignedOperation(OperationCode::IArithmeticShiftRight, result_signed, value, shift);
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}
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SetInternalFlagsFromInteger(bb, value, instr.generates_cc);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::VSETP: {
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// We can't use the constant predicate as destination.
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ASSERT(instr.vsetp.pred3 != static_cast<u64>(Pred::UnusedIndex));
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const bool sign = instr.video.signed_a == 1 || instr.video.signed_b == 1;
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const Node first_pred = GetPredicateComparisonInteger(instr.vsetp.cond, sign, op_a, op_b);
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const Node second_pred = GetPredicate(instr.vsetp.pred39, false);
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const OperationCode combiner = GetPredicateCombiner(instr.vsetp.op);
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// Set the primary predicate to the result of Predicate OP SecondPredicate
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SetPredicate(bb, instr.vsetp.pred3, Operation(combiner, first_pred, second_pred));
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if (instr.vsetp.pred0 != static_cast<u64>(Pred::UnusedIndex)) {
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// Set the secondary predicate to the result of !Predicate OP SecondPredicate,
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// if enabled
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const Node negate_pred = Operation(OperationCode::LogicalNegate, first_pred);
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SetPredicate(bb, instr.vsetp.pred0, Operation(combiner, negate_pred, second_pred));
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}
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled video instruction: {}", opcode->get().GetName());
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}
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return pc;
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}
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Node ShaderIR::GetVideoOperand(Node op, bool is_chunk, bool is_signed,
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Tegra::Shader::VideoType type, u64 byte_height) {
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if (!is_chunk) {
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return BitfieldExtract(op, static_cast<u32>(byte_height * 8), 8);
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}
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const Node zero = Immediate(0);
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switch (type) {
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case Tegra::Shader::VideoType::Size16_Low:
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return BitfieldExtract(op, 0, 16);
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case Tegra::Shader::VideoType::Size16_High:
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return BitfieldExtract(op, 16, 16);
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case Tegra::Shader::VideoType::Size32:
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// TODO(Rodrigo): From my hardware tests it becomes a bit "mad" when this type is used
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// (1 * 1 + 0 == 0x5b800000). Until a better explanation is found: abort.
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UNIMPLEMENTED();
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return zero;
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case Tegra::Shader::VideoType::Invalid:
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UNREACHABLE_MSG("Invalid instruction encoding");
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return zero;
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default:
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UNREACHABLE();
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return zero;
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}
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}
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} // namespace VideoCommon::Shader
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