mirror of
https://gitlab.com/suyu-emu/suyu.git
synced 2024-03-15 23:15:44 +00:00
Merge pull request #9352 from lioncash/vidcast
engines: Remove unnecessary casts
This commit is contained in:
commit
c845d8a9e8
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@ -49,10 +49,9 @@ void State::ProcessData(std::span<const u8> read_buffer) {
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if (regs.line_count == 1) {
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rasterizer->AccelerateInlineToMemory(address, copy_size, read_buffer);
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} else {
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for (u32 line = 0; line < regs.line_count; ++line) {
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const GPUVAddr dest_line = address + static_cast<size_t>(line) * regs.dest.pitch;
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std::span<const u8> buffer(read_buffer.data() +
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static_cast<size_t>(line) * regs.line_length_in,
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for (size_t line = 0; line < regs.line_count; ++line) {
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const GPUVAddr dest_line = address + line * regs.dest.pitch;
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std::span<const u8> buffer(read_buffer.data() + line * regs.line_length_in,
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regs.line_length_in);
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rasterizer->AccelerateInlineToMemory(dest_line, regs.line_length_in, buffer);
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}
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@ -39,7 +39,7 @@ struct Registers {
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u32 y;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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u32 BlockWidth() const {
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@ -97,7 +97,7 @@ public:
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u32 addr_lower;
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[[nodiscard]] constexpr GPUVAddr Address() const noexcept {
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return (static_cast<GPUVAddr>(addr_upper) << 32) | static_cast<GPUVAddr>(addr_lower);
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return (GPUVAddr{addr_upper} << 32) | GPUVAddr{addr_lower};
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}
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};
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static_assert(sizeof(Surface) == 0x28, "Surface has incorrect size");
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@ -50,11 +50,11 @@ void KeplerCompute::CallMultiMethod(u32 method, const u32* base_start, u32 amoun
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u32 methods_pending) {
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switch (method) {
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case KEPLER_COMPUTE_REG_INDEX(data_upload):
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upload_state.ProcessData(base_start, static_cast<size_t>(amount));
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upload_state.ProcessData(base_start, amount);
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return;
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default:
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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for (u32 i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - i <= 1);
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}
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break;
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}
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@ -68,7 +68,7 @@ public:
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struct {
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u32 address;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address) << 8));
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return GPUVAddr{address} << 8;
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}
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} launch_desc_loc;
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@ -83,8 +83,7 @@ public:
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u32 address_low;
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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} tsc;
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@ -95,8 +94,7 @@ public:
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u32 address_low;
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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} tic;
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@ -106,8 +104,7 @@ public:
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u32 address_high;
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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} code_loc;
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@ -162,8 +159,7 @@ public:
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BitField<15, 17, u32> size;
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};
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high.Value()) << 32) |
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address_low);
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return (GPUVAddr{address_high.Value()} << 32) | GPUVAddr{address_low};
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}
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};
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std::array<ConstBufferConfig, NumConstBuffers> const_buffer_config;
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@ -42,11 +42,11 @@ void KeplerMemory::CallMultiMethod(u32 method, const u32* base_start, u32 amount
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u32 methods_pending) {
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switch (method) {
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case KEPLERMEMORY_REG_INDEX(data):
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upload_state.ProcessData(base_start, static_cast<size_t>(amount));
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upload_state.ProcessData(base_start, amount);
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return;
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default:
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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for (u32 i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - i <= 1);
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}
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break;
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}
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@ -370,11 +370,11 @@ void Maxwell3D::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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ProcessCBMultiData(base_start, amount);
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break;
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case MAXWELL3D_REG_INDEX(inline_data):
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upload_state.ProcessData(base_start, static_cast<size_t>(amount));
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upload_state.ProcessData(base_start, amount);
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return;
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default:
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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for (u32 i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - i <= 1);
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}
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break;
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}
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@ -652,12 +652,12 @@ void Maxwell3D::ProcessDeferredDraw() {
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return;
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}
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u32 method_count = static_cast<u32>(deferred_draw_method.size());
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const auto method_count = deferred_draw_method.size();
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u32 instance_count = 1;
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u32 vertex_buffer_count = 0;
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u32 index_buffer_count = 0;
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for (u32 index = 0; index < method_count; ++index) {
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u32 method = deferred_draw_method[index];
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for (size_t index = 0; index < method_count; ++index) {
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const u32 method = deferred_draw_method[index];
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if (method == MAXWELL3D_REG_INDEX(vertex_buffer.count)) {
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instance_count = ++vertex_buffer_count;
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} else if (method == MAXWELL3D_REG_INDEX(index_buffer.count)) {
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@ -96,8 +96,7 @@ public:
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u32 type;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -106,8 +105,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -124,8 +122,7 @@ public:
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Mode mode;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(offset_high) << 32) |
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offset_low);
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return (GPUVAddr{offset_high} << 32) | GPUVAddr{offset_low};
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}
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};
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@ -187,7 +184,7 @@ public:
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default:
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// Thresholds begin at 0x10 (1 << 4)
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// Threshold is in the range 0x1 to 0x13
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return 1 << (4 + threshold.Value() - 1);
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return 1U << (4 + threshold.Value() - 1);
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}
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}
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};
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@ -468,8 +465,7 @@ public:
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INSERT_PADDING_BYTES_NOINIT(0xC);
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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static_assert(sizeof(Buffer) == 0x20);
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@ -511,12 +507,11 @@ public:
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u32 default_size_per_warp;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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u64 Size() const {
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return (static_cast<u64>(size_high) << 32) | size_low;
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return (u64{size_high} << 32) | u64{size_low};
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}
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};
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@ -538,13 +533,11 @@ public:
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u32 storage_limit_address_low;
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GPUVAddr StorageAddress() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(storage_address_high) << 32) |
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storage_address_low);
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return (GPUVAddr{storage_address_high} << 32) | GPUVAddr{storage_address_low};
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}
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GPUVAddr StorageLimitAddress() const {
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return static_cast<GPUVAddr>(
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(static_cast<GPUVAddr>(storage_limit_address_high) << 32) |
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storage_limit_address_low);
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return (GPUVAddr{storage_limit_address_high} << 32) |
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GPUVAddr{storage_limit_address_low};
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}
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};
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@ -829,11 +822,11 @@ public:
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struct CompressionThresholdSamples {
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u32 samples;
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u32 Samples() {
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u32 Samples() const {
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if (samples == 0) {
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return 0;
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}
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return 1 << (samples - 1);
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return 1U << (samples - 1);
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}
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};
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@ -1138,8 +1131,7 @@ public:
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INSERT_PADDING_BYTES_NOINIT(0x18);
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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static_assert(sizeof(RenderTargetConfig) == 0x40);
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@ -1482,8 +1474,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1533,8 +1524,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1561,8 +1551,7 @@ public:
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u32 array_pitch;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1910,8 +1899,7 @@ public:
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Mode mode;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1921,8 +1909,7 @@ public:
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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@ -1932,8 +1919,7 @@ public:
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u32 limit;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
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};
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|
@ -1981,8 +1967,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
|
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};
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|
@ -2027,8 +2012,7 @@ public:
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u32 address_low;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
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address_low);
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
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}
|
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};
|
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|
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|
@ -2224,19 +2208,16 @@ public:
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}
|
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|
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GPUVAddr StartAddress() const {
|
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(start_addr_high) << 32) |
|
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start_addr_low);
|
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return (GPUVAddr{start_addr_high} << 32) | GPUVAddr{start_addr_low};
|
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}
|
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|
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GPUVAddr EndAddress() const {
|
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(limit_addr_high) << 32) |
|
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limit_addr_low);
|
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return (GPUVAddr{limit_addr_high} << 32) | GPUVAddr{limit_addr_low};
|
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}
|
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|
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/// Adjust the index buffer offset so it points to the first desired index.
|
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GPUVAddr IndexStart() const {
|
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return StartAddress() +
|
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static_cast<size_t>(first) * static_cast<size_t>(FormatSizeInBytes());
|
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return StartAddress() + size_t{first} * size_t{FormatSizeInBytes()};
|
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}
|
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};
|
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|
@ -2464,8 +2445,7 @@ public:
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} query;
|
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|
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GPUVAddr Address() const {
|
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
||||
address_low);
|
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return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -2479,8 +2459,7 @@ public:
|
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u32 frequency;
|
||||
|
||||
GPUVAddr Address() const {
|
||||
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
||||
address_low);
|
||||
return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
|
||||
}
|
||||
|
||||
bool IsEnabled() const {
|
||||
|
@ -2494,8 +2473,7 @@ public:
|
|||
u32 address_low;
|
||||
|
||||
GPUVAddr Address() const {
|
||||
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
||||
address_low);
|
||||
return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
|
||||
}
|
||||
};
|
||||
static_assert(sizeof(VertexStreamLimit) == 0x8);
|
||||
|
@ -2543,8 +2521,7 @@ public:
|
|||
std::array<u32, NumCBData> buffer;
|
||||
|
||||
GPUVAddr Address() const {
|
||||
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
|
||||
address_low);
|
||||
return (GPUVAddr{address_high} << 32) | GPUVAddr{address_low};
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
@ -41,8 +41,8 @@ void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call)
|
|||
|
||||
void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
|
||||
u32 methods_pending) {
|
||||
for (size_t i = 0; i < amount; ++i) {
|
||||
CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
|
||||
for (u32 i = 0; i < amount; ++i) {
|
||||
CallMethod(method, base_start[i], methods_pending - i <= 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -94,14 +94,14 @@ void MaxwellDMA::Launch() {
|
|||
reinterpret_cast<u8*>(tmp_buffer.data()),
|
||||
regs.line_length_in * sizeof(u32));
|
||||
} else {
|
||||
auto convert_linear_2_blocklinear_addr = [](u64 address) {
|
||||
const auto convert_linear_2_blocklinear_addr = [](u64 address) {
|
||||
return (address & ~0x1f0ULL) | ((address & 0x40) >> 2) | ((address & 0x10) << 1) |
|
||||
((address & 0x180) >> 1) | ((address & 0x20) << 3);
|
||||
};
|
||||
auto src_kind = memory_manager.GetPageKind(regs.offset_in);
|
||||
auto dst_kind = memory_manager.GetPageKind(regs.offset_out);
|
||||
const bool is_src_pitch = IsPitchKind(static_cast<PTEKind>(src_kind));
|
||||
const bool is_dst_pitch = IsPitchKind(static_cast<PTEKind>(dst_kind));
|
||||
const auto src_kind = memory_manager.GetPageKind(regs.offset_in);
|
||||
const auto dst_kind = memory_manager.GetPageKind(regs.offset_out);
|
||||
const bool is_src_pitch = IsPitchKind(src_kind);
|
||||
const bool is_dst_pitch = IsPitchKind(dst_kind);
|
||||
if (!is_src_pitch && is_dst_pitch) {
|
||||
UNIMPLEMENTED_IF(regs.line_length_in % 16 != 0);
|
||||
UNIMPLEMENTED_IF(regs.offset_in % 16 != 0);
|
||||
|
|
|
@ -31,7 +31,7 @@ void Puller::ProcessBindMethod(const MethodCall& method_call) {
|
|||
LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
|
||||
method_call.argument);
|
||||
const auto engine_id = static_cast<EngineID>(method_call.argument);
|
||||
bound_engines[method_call.subchannel] = static_cast<EngineID>(engine_id);
|
||||
bound_engines[method_call.subchannel] = engine_id;
|
||||
switch (engine_id) {
|
||||
case EngineID::FERMI_TWOD_A:
|
||||
dma_pusher.BindSubchannel(channel_state.fermi_2d.get(), method_call.subchannel);
|
||||
|
@ -285,12 +285,12 @@ void Puller::CallMultiMethod(u32 method, u32 subchannel, const u32* base_start,
|
|||
if (ExecuteMethodOnEngine(method)) {
|
||||
CallEngineMultiMethod(method, subchannel, base_start, amount, methods_pending);
|
||||
} else {
|
||||
for (std::size_t i = 0; i < amount; i++) {
|
||||
for (u32 i = 0; i < amount; i++) {
|
||||
CallPullerMethod(MethodCall{
|
||||
method,
|
||||
base_start[i],
|
||||
subchannel,
|
||||
methods_pending - static_cast<u32>(i),
|
||||
methods_pending - i,
|
||||
});
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue