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video_core: dma_pusher: Add support for prefetched command lists.
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1d4cbb92f2
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@ -45,18 +45,28 @@ bool DmaPusher::Step() {
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return false;
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}
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const CommandList& command_list{dma_pushbuffer.front()};
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ASSERT_OR_EXECUTE(!command_list.empty(), {
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CommandList& command_list{dma_pushbuffer.front()};
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ASSERT_OR_EXECUTE(
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command_list.command_lists.size() || command_list.prefetch_command_list.size(), {
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// Somehow the command_list is empty, in order to avoid a crash
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// We ignore it and assume its size is 0.
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dma_pushbuffer.pop();
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dma_pushbuffer_subindex = 0;
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return true;
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});
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const CommandListHeader command_list_header{command_list[dma_pushbuffer_subindex++]};
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if (command_list.prefetch_command_list.size()) {
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// Prefetched command list from nvdrv, used for things like synchronization
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command_headers = std::move(command_list.prefetch_command_list);
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dma_pushbuffer.pop();
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} else {
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const CommandListHeader command_list_header{
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command_list.command_lists[dma_pushbuffer_subindex]};
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const u64 next_hash = command_list.command_list_hashes[dma_pushbuffer_subindex++];
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const GPUVAddr dma_get = command_list_header.addr;
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if (dma_pushbuffer_subindex >= command_list.size()) {
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if (dma_pushbuffer_subindex >= command_list.command_lists.size()) {
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// We've gone through the current list, remove it from the queue
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dma_pushbuffer.pop();
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dma_pushbuffer_subindex = 0;
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@ -70,7 +80,7 @@ bool DmaPusher::Step() {
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command_headers.resize(command_list_header.size);
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gpu.MemoryManager().ReadBlockUnsafe(dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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}
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for (std::size_t index = 0; index < command_headers.size();) {
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const CommandHeader& command_header = command_headers[index];
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@ -74,9 +74,26 @@ union CommandHeader {
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static_assert(std::is_standard_layout_v<CommandHeader>, "CommandHeader is not standard layout");
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static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
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static constexpr CommandHeader BuildCommandHeader(BufferMethods method, u32 arg_count,
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SubmissionMode mode) {
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CommandHeader result{};
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result.method.Assign(static_cast<u32>(method));
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result.arg_count.Assign(arg_count);
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result.mode.Assign(mode);
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return result;
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}
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class GPU;
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using CommandList = std::vector<Tegra::CommandListHeader>;
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struct CommandList final {
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CommandList() = default;
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explicit CommandList(std::size_t size) : command_lists(size) {}
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explicit CommandList(std::vector<Tegra::CommandHeader>&& prefetch_command_list)
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: prefetch_command_list{std::move(prefetch_command_list)} {}
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std::vector<Tegra::CommandListHeader> command_lists;
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std::vector<Tegra::CommandHeader> prefetch_command_list;
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};
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/**
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* The DmaPusher class implements DMA submission to FIFOs, providing an area of memory that the
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@ -85,7 +102,7 @@ using CommandList = std::vector<Tegra::CommandListHeader>;
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* See https://envytools.readthedocs.io/en/latest/hw/fifo/dma-pusher.html#fifo-dma-pusher for
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* details on this implementation.
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*/
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class DmaPusher {
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class DmaPusher final {
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public:
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explicit DmaPusher(Core::System& system, GPU& gpu);
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~DmaPusher();
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