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Address more review comments
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parent
d040b27a35
commit
9ff8d0f3e6
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@ -82,8 +82,8 @@ abstract class SettingsItem(
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IntSetting.CPU_BACKEND,
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IntSetting.CPU_BACKEND,
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R.string.cpu_backend,
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R.string.cpu_backend,
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0,
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0,
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R.array.cpuBackendNames,
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R.array.cpuBackendArm64Names,
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R.array.cpuBackendValues
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R.array.cpuBackendArm64Values
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)
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)
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)
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)
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put(
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put(
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@ -175,16 +175,24 @@
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<item>2</item>
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<item>2</item>
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</integer-array>
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</integer-array>
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<string-array name="cpuBackendNames">
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<string-array name="cpuBackendArm64Names">
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<item>@string/cpu_backend_dynarmic</item>
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<item>@string/cpu_backend_dynarmic</item>
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<item>@string/cpu_backend_nce</item>
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<item>@string/cpu_backend_nce</item>
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</string-array>
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</string-array>
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<integer-array name="cpuBackendValues">
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<integer-array name="cpuBackendArm64Values">
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<item>0</item>
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<item>0</item>
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<item>1</item>
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<item>1</item>
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</integer-array>
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</integer-array>
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<string-array name="cpuBackendX86Names">
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<item>@string/cpu_backend_dynarmic</item>
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</string-array>
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<integer-array name="cpuBackendX86Values">
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<item>0</item>
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</integer-array>
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<string-array name="cpuAccuracyNames">
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<string-array name="cpuAccuracyNames">
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<item>@string/auto</item>
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<item>@string/auto</item>
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<item>@string/cpu_accuracy_accurate</item>
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<item>@string/cpu_accuracy_accurate</item>
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@ -185,7 +185,7 @@
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<string name="frame_limit_enable_description">Limits emulation speed to a specified percentage of normal speed.</string>
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<string name="frame_limit_enable_description">Limits emulation speed to a specified percentage of normal speed.</string>
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<string name="frame_limit_slider">Limit speed percent</string>
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<string name="frame_limit_slider">Limit speed percent</string>
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<string name="frame_limit_slider_description">Specifies the percentage to limit emulation speed. 100% is the normal speed. Values higher or lower will increase or decrease the speed limit.</string>
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<string name="frame_limit_slider_description">Specifies the percentage to limit emulation speed. 100% is the normal speed. Values higher or lower will increase or decrease the speed limit.</string>
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<string name="cpu_backend">CPU Backend</string>
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<string name="cpu_backend">CPU backend</string>
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<string name="cpu_accuracy">CPU accuracy</string>
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<string name="cpu_accuracy">CPU accuracy</string>
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<string name="value_with_units">%1$s%2$s</string>
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<string name="value_with_units">%1$s%2$s</string>
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@ -90,6 +90,10 @@ void Patcher::PatchText(const Kernel::PhysicalMemory& program_image,
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WriteMsrHandler(AddRelocations(), oaknut::XReg{static_cast<int>(msr.GetRt())});
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WriteMsrHandler(AddRelocations(), oaknut::XReg{static_cast<int>(msr.GetRt())});
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continue;
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continue;
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}
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}
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if (auto exclusive = Exclusive{inst}; exclusive.Verify()) {
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m_exclusives.push_back(i);
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}
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}
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}
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// Determine patching mode for the final relocation step
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// Determine patching mode for the final relocation step
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@ -163,11 +167,9 @@ void Patcher::RelocateAndCopy(Common::ProcessAddress load_base,
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// Cortex-A57 seems to treat all exclusives as ordered, but newer processors do not.
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// Cortex-A57 seems to treat all exclusives as ordered, but newer processors do not.
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// Convert to ordered to preserve this assumption.
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// Convert to ordered to preserve this assumption.
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for (u32 i = ModuleCodeIndex; i < static_cast<u32>(text_words.size()); i++) {
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for (const ModuleTextAddress i : m_exclusives) {
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const u32 inst = text_words[i];
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auto exclusive = Exclusive{text_words[i]};
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if (auto exclusive = Exclusive{inst}; exclusive.Verify()) {
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text_words[i] = exclusive.AsOrdered();
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text_words[i] = exclusive.AsOrdered();
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}
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}
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}
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// Copy to program image
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// Copy to program image
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@ -93,6 +93,7 @@ private:
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std::vector<Relocation> m_branch_to_patch_relocations{};
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std::vector<Relocation> m_branch_to_patch_relocations{};
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std::vector<Relocation> m_branch_to_module_relocations{};
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std::vector<Relocation> m_branch_to_module_relocations{};
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std::vector<Relocation> m_write_module_pc_relocations{};
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std::vector<Relocation> m_write_module_pc_relocations{};
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std::vector<ModuleTextAddress> m_exclusives{};
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oaknut::Label m_save_context{};
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oaknut::Label m_save_context{};
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oaknut::Label m_load_context{};
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oaknut::Label m_load_context{};
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PatchMode mode{PatchMode::None};
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PatchMode mode{PatchMode::None};
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@ -5678,15 +5678,8 @@ Result KPageTableBase::Operate(PageLinkedList* page_list, KProcessAddress virt_a
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case OperationType::ChangePermissions:
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case OperationType::ChangePermissions:
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case OperationType::ChangePermissionsAndRefresh:
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case OperationType::ChangePermissionsAndRefresh:
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case OperationType::ChangePermissionsAndRefreshAndFlush: {
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case OperationType::ChangePermissionsAndRefreshAndFlush: {
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const bool read = True(properties.perm & Kernel::KMemoryPermission::UserRead);
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m_memory->ProtectRegion(*m_impl, virt_addr, num_pages * PageSize,
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const bool write = True(properties.perm & Kernel::KMemoryPermission::UserWrite);
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ConvertToMemoryPermission(properties.perm));
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// todo: this doesn't really belong here and should go into m_memory to handle rasterizer
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// access todo: ignore exec on non-direct-mapped case
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const bool exec = True(properties.perm & Kernel::KMemoryPermission::UserExecute);
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if (Settings::IsFastmemEnabled()) {
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m_system.DeviceMemory().buffer.Protect(GetInteger(virt_addr), num_pages * PageSize,
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read, write, exec);
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}
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R_SUCCEED();
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R_SUCCEED();
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}
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}
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default:
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default:
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@ -78,6 +78,51 @@ struct Memory::Impl {
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}
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}
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}
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}
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void ProtectRegion(Common::PageTable& page_table, VAddr vaddr, u64 size,
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Common::MemoryPermission perms) {
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ASSERT_MSG((size & YUZU_PAGEMASK) == 0, "non-page aligned size: {:016X}", size);
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ASSERT_MSG((vaddr & YUZU_PAGEMASK) == 0, "non-page aligned base: {:016X}", vaddr);
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if (!Settings::IsFastmemEnabled()) {
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return;
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}
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const bool is_r = True(perms & Common::MemoryPermission::Read);
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const bool is_w = True(perms & Common::MemoryPermission::Write);
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const bool is_x =
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True(perms & Common::MemoryPermission::Execute) && Settings::IsNceEnabled();
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if (!current_page_table) {
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system.DeviceMemory().buffer.Protect(vaddr, size, is_r, is_w, is_x);
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return;
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}
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u64 protect_bytes{};
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u64 protect_begin{};
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for (u64 addr = vaddr; addr < vaddr + size; addr += YUZU_PAGESIZE) {
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const Common::PageType page_type{
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current_page_table->pointers[addr >> YUZU_PAGEBITS].Type()};
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switch (page_type) {
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case Common::PageType::RasterizerCachedMemory:
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if (protect_bytes > 0) {
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system.DeviceMemory().buffer.Protect(protect_begin, protect_bytes, is_r, is_w,
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is_x);
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protect_bytes = 0;
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}
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break;
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default:
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if (protect_bytes == 0) {
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protect_begin = addr;
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}
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protect_bytes += YUZU_PAGESIZE;
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}
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}
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if (protect_bytes > 0) {
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system.DeviceMemory().buffer.Protect(protect_begin, protect_bytes, is_r, is_w, is_x);
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}
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}
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[[nodiscard]] u8* GetPointerFromRasterizerCachedMemory(u64 vaddr) const {
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[[nodiscard]] u8* GetPointerFromRasterizerCachedMemory(u64 vaddr) const {
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const Common::PhysicalAddress paddr{
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const Common::PhysicalAddress paddr{
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current_page_table->backing_addr[vaddr >> YUZU_PAGEBITS]};
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current_page_table->backing_addr[vaddr >> YUZU_PAGEBITS]};
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@ -839,6 +884,11 @@ void Memory::UnmapRegion(Common::PageTable& page_table, Common::ProcessAddress b
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impl->UnmapRegion(page_table, base, size);
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impl->UnmapRegion(page_table, base, size);
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}
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}
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void Memory::ProtectRegion(Common::PageTable& page_table, Common::ProcessAddress vaddr, u64 size,
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Common::MemoryPermission perms) {
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impl->ProtectRegion(page_table, GetInteger(vaddr), size, perms);
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}
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bool Memory::IsValidVirtualAddress(const Common::ProcessAddress vaddr) const {
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bool Memory::IsValidVirtualAddress(const Common::ProcessAddress vaddr) const {
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const Kernel::KProcess& process = *system.ApplicationProcess();
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const Kernel::KProcess& process = *system.ApplicationProcess();
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const auto& page_table = process.GetPageTable().GetImpl();
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const auto& page_table = process.GetPageTable().GetImpl();
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@ -97,6 +97,17 @@ public:
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*/
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*/
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void UnmapRegion(Common::PageTable& page_table, Common::ProcessAddress base, u64 size);
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void UnmapRegion(Common::PageTable& page_table, Common::ProcessAddress base, u64 size);
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/**
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* Protects a region of the emulated process address space with the new permissions.
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*
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* @param page_table The page table of the emulated process.
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* @param base The start address to re-protect. Must be page-aligned.
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* @param size The amount of bytes to protect. Must be page-aligned.
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* @param perms The permissions the address range is mapped.
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*/
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void ProtectRegion(Common::PageTable& page_table, Common::ProcessAddress base, u64 size,
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Common::MemoryPermission perms);
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/**
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/**
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* Checks whether or not the supplied address is a valid virtual
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* Checks whether or not the supplied address is a valid virtual
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* address for the current process.
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* address for the current process.
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