mirror of
https://gitlab.com/suyu-emu/suyu.git
synced 2024-03-15 23:15:44 +00:00
shader: Implement TLD4.PTP
This commit is contained in:
parent
981eb6f43b
commit
742d11c2ad
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@ -169,6 +169,7 @@ void EmitContext::DefineCommonTypes(const Info& info) {
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AddCapability(spv::Capability::Float64);
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AddCapability(spv::Capability::Float64);
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F64.Define(*this, TypeFloat(64), "f64");
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F64.Define(*this, TypeFloat(64), "f64");
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}
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}
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array_U32x2 = Name(TypeArray(U32[2], Constant(U32[1], 4U)), "array-u32x2");
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}
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}
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void EmitContext::DefineCommonConstants() {
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void EmitContext::DefineCommonConstants() {
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@ -65,6 +65,7 @@ public:
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VectorTypes U32;
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VectorTypes U32;
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VectorTypes F16;
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VectorTypes F16;
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VectorTypes F64;
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VectorTypes F64;
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Id array_U32x2;
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Id true_value{};
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Id true_value{};
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Id false_value{};
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Id false_value{};
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@ -95,7 +95,7 @@ void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Va
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Id value);
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Id value);
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void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id value);
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Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2);
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Id EmitCompositeConstructU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2);
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Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index);
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@ -104,7 +104,7 @@ Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2);
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Id EmitCompositeConstructF16x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2);
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Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index);
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@ -113,7 +113,7 @@ Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2);
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Id EmitCompositeConstructF32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2);
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Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3);
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Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4);
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Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index);
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@ -122,6 +122,7 @@ Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index);
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Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index);
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Id EmitCompositeConstructArrayU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2, Id e3, Id e4);
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void EmitCompositeConstructF64x2(EmitContext& ctx);
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void EmitCompositeConstructF64x2(EmitContext& ctx);
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void EmitCompositeConstructF64x3(EmitContext& ctx);
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void EmitCompositeConstructF64x3(EmitContext& ctx);
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void EmitCompositeConstructF64x4(EmitContext& ctx);
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void EmitCompositeConstructF64x4(EmitContext& ctx);
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@ -3,10 +3,15 @@
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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namespace Shader::Backend::SPIRV {
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namespace Shader::Backend::SPIRV {
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Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2) {
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Id EmitCompositeConstructU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.U32[2], e1, e2);
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}
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return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
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return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
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}
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}
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@ -42,7 +47,12 @@ Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index
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return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
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return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
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}
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}
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Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2) {
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Id EmitCompositeConstructF16x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.F16[2], e1, e2);
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}
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return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
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return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
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}
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}
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@ -78,7 +88,11 @@ Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index
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return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
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return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
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}
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}
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Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2) {
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Id EmitCompositeConstructF32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.F32[2], e1, e2);
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}
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return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
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return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
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}
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}
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@ -150,4 +164,15 @@ Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index
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return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
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return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
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}
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}
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Id EmitCompositeConstructArrayU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2, Id e3, Id e4) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.array_U32x2, e1, e2, e3, e4);
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}
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if (ctx.profile.support_variadic_ptp) {
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return OpCompositeConstruct(ctx.array_U32x2, e1, e2, e3, e4);
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}
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return {};
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}
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} // namespace Shader::Backend::SPIRV
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} // namespace Shader::Backend::SPIRV
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@ -30,10 +30,13 @@ public:
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}
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}
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}
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}
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explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset) {
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explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset, Id offset2) {
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if (Sirit::ValidId(offset)) {
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if (Sirit::ValidId(offset)) {
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Add(spv::ImageOperandsMask::Offset, offset);
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Add(spv::ImageOperandsMask::Offset, offset);
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}
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}
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if (Sirit::ValidId(offset2)) {
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Add(spv::ImageOperandsMask::ConstOffsets, offset2);
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}
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}
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}
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void Add(spv::ImageOperandsMask new_mask, Id value) {
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void Add(spv::ImageOperandsMask new_mask, Id value) {
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@ -177,7 +180,7 @@ Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
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[[maybe_unused]] Id offset2) {
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[[maybe_unused]] Id offset2) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const ImageOperands operands(ctx, offset);
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const ImageOperands operands(ctx, offset, offset2);
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return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst,
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return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst,
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ctx.F32[4], Texture(ctx, index), coords,
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ctx.F32[4], Texture(ctx, index), coords,
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ctx.Constant(ctx.U32[1], info.gather_component.Value()), operands.Mask(),
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ctx.Constant(ctx.U32[1], info.gather_component.Value()), operands.Mask(),
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@ -187,7 +190,7 @@ Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id
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Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id offset, [[maybe_unused]] Id offset2, Id dref) {
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Id offset, [[maybe_unused]] Id offset2, Id dref) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const ImageOperands operands(ctx, offset);
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const ImageOperands operands(ctx, offset, offset2);
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return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
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return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
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ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
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ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
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}
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}
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@ -398,15 +398,16 @@ Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2) {
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if (e1.Type() != e2.Type()) {
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if (e1.Type() != e2.Type()) {
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throw InvalidArgument("Mismatching types {} and {}", e1.Type(), e2.Type());
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throw InvalidArgument("Mismatching types {} and {}", e1.Type(), e2.Type());
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}
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}
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CompositeDecoration decor{};
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switch (e1.Type()) {
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switch (e1.Type()) {
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case Type::U32:
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case Type::U32:
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return Inst(Opcode::CompositeConstructU32x2, e1, e2);
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return Inst(Opcode::CompositeConstructU32x2, Flags{decor}, e1, e2);
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case Type::F16:
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case Type::F16:
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return Inst(Opcode::CompositeConstructF16x2, e1, e2);
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return Inst(Opcode::CompositeConstructF16x2, Flags{decor}, e1, e2);
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case Type::F32:
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case Type::F32:
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return Inst(Opcode::CompositeConstructF32x2, e1, e2);
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return Inst(Opcode::CompositeConstructF32x2, Flags{decor}, e1, e2);
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case Type::F64:
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case Type::F64:
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return Inst(Opcode::CompositeConstructF64x2, e1, e2);
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return Inst(Opcode::CompositeConstructF64x2, Flags{decor}, e1, e2);
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default:
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default:
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ThrowInvalidType(e1.Type());
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ThrowInvalidType(e1.Type());
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}
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}
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@ -436,6 +437,7 @@ Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Valu
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throw InvalidArgument("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(),
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throw InvalidArgument("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(),
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e3.Type(), e4.Type());
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e3.Type(), e4.Type());
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}
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}
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CompositeDecoration decor{};
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switch (e1.Type()) {
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switch (e1.Type()) {
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case Type::U32:
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case Type::U32:
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return Inst(Opcode::CompositeConstructU32x4, e1, e2, e3, e4);
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return Inst(Opcode::CompositeConstructU32x4, e1, e2, e3, e4);
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@ -445,6 +447,8 @@ Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Valu
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return Inst(Opcode::CompositeConstructF32x4, e1, e2, e3, e4);
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return Inst(Opcode::CompositeConstructF32x4, e1, e2, e3, e4);
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case Type::F64:
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case Type::F64:
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return Inst(Opcode::CompositeConstructF64x4, e1, e2, e3, e4);
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return Inst(Opcode::CompositeConstructF64x4, e1, e2, e3, e4);
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case Type::U32x2:
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return Inst(Opcode::CompositeConstructArrayU32x2, Flags{decor}, e1, e2, e3, e4);
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default:
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default:
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ThrowInvalidType(e1.Type());
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ThrowInvalidType(e1.Type());
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}
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}
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@ -1481,7 +1485,7 @@ Value IREmitter::ImageGather(const Value& handle, const Value& coords, const Val
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}
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}
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Value IREmitter::ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
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Value IREmitter::ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
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const Value& offset2, const F32& dref, TextureInstInfo info) {
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const Value& offset2, const F32& dref, TextureInstInfo info) {
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const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGatherDref
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const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGatherDref
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: Opcode::BindlessImageGatherDref};
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: Opcode::BindlessImageGatherDref};
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return Inst(op, Flags{info}, handle, coords, offset, offset2, dref);
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return Inst(op, Flags{info}, handle, coords, offset, offset2, dref);
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@ -99,6 +99,12 @@ public:
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return ret;
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return ret;
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}
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}
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template <typename FlagsType>
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requires(sizeof(FlagsType) <= sizeof(u32) && std::is_trivially_copyable_v<FlagsType>)
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[[nodiscard]] void SetFlags(FlagsType& new_val) noexcept {
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std::memcpy(&flags, &new_val, sizeof(new_val));
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}
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/// Intrusively store the host definition of this instruction.
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/// Intrusively store the host definition of this instruction.
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template <typename DefinitionType>
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template <typename DefinitionType>
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void SetDefinition(DefinitionType def) {
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void SetDefinition(DefinitionType def) {
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@ -32,6 +32,11 @@ struct FpControl {
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};
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};
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static_assert(sizeof(FpControl) <= sizeof(u32));
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static_assert(sizeof(FpControl) <= sizeof(u32));
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struct CompositeDecoration {
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bool is_constant{false};
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};
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static_assert(sizeof(CompositeDecoration) <= sizeof(u32));
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union TextureInstInfo {
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union TextureInstInfo {
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u32 raw;
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u32 raw;
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BitField<0, 8, TextureType> type;
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BitField<0, 8, TextureType> type;
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@ -126,6 +126,7 @@ OPCODE(CompositeExtractF64x4, F64, F64x
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OPCODE(CompositeInsertF64x2, F64x2, F64x2, F64, U32, )
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OPCODE(CompositeInsertF64x2, F64x2, F64x2, F64, U32, )
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OPCODE(CompositeInsertF64x3, F64x3, F64x3, F64, U32, )
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OPCODE(CompositeInsertF64x3, F64x3, F64x3, F64, U32, )
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OPCODE(CompositeInsertF64x4, F64x4, F64x4, F64, U32, )
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OPCODE(CompositeInsertF64x4, F64x4, F64x4, F64, U32, )
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OPCODE(CompositeConstructArrayU32x2, Opaque, U32x2, U32x2, U32x2, U32x2, )
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// Select operations
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// Select operations
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OPCODE(SelectU1, U1, U1, U1, U1, )
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OPCODE(SelectU1, U1, U1, U1, U1, )
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|
@ -44,6 +44,20 @@ bool Value::IsEmpty() const noexcept {
|
||||||
return type == Type::Void;
|
return type == Type::Void;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bool Value::IsConstantContainer() const {
|
||||||
|
if (IsImmediate()) {
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
ValidateAccess(Type::Opaque);
|
||||||
|
auto num_args = inst->NumArgs();
|
||||||
|
for (size_t i = 0; i < num_args; i++) {
|
||||||
|
if (!inst->Arg(i).IsConstantContainer()) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
bool Value::IsImmediate() const noexcept {
|
bool Value::IsImmediate() const noexcept {
|
||||||
if (IsIdentity()) {
|
if (IsIdentity()) {
|
||||||
return inst->Arg(0).IsImmediate();
|
return inst->Arg(0).IsImmediate();
|
||||||
|
|
|
@ -38,6 +38,7 @@ public:
|
||||||
[[nodiscard]] bool IsImmediate() const noexcept;
|
[[nodiscard]] bool IsImmediate() const noexcept;
|
||||||
[[nodiscard]] bool IsLabel() const noexcept;
|
[[nodiscard]] bool IsLabel() const noexcept;
|
||||||
[[nodiscard]] IR::Type Type() const noexcept;
|
[[nodiscard]] IR::Type Type() const noexcept;
|
||||||
|
[[nodiscard]] bool IsConstantContainer() const;
|
||||||
|
|
||||||
[[nodiscard]] IR::Inst* Inst() const;
|
[[nodiscard]] IR::Inst* Inst() const;
|
||||||
[[nodiscard]] IR::Block* Label() const;
|
[[nodiscard]] IR::Block* Label() const;
|
||||||
|
|
|
@ -101,16 +101,18 @@ IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) {
|
||||||
switch (type) {
|
switch (type) {
|
||||||
case TextureType::_1D:
|
case TextureType::_1D:
|
||||||
case TextureType::ARRAY_1D:
|
case TextureType::ARRAY_1D:
|
||||||
return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4));
|
return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true);
|
||||||
case TextureType::_2D:
|
case TextureType::_2D:
|
||||||
case TextureType::ARRAY_2D:
|
case TextureType::ARRAY_2D:
|
||||||
return v.ir.CompositeConstruct(v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4)),
|
return v.ir.CompositeConstruct(
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4)));
|
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true),
|
||||||
|
v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4), true));
|
||||||
case TextureType::_3D:
|
case TextureType::_3D:
|
||||||
case TextureType::ARRAY_3D:
|
case TextureType::ARRAY_3D:
|
||||||
return v.ir.CompositeConstruct(v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4)),
|
return v.ir.CompositeConstruct(
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4)),
|
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true),
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(4)));
|
v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4), true),
|
||||||
|
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(4), true));
|
||||||
case TextureType::CUBE:
|
case TextureType::CUBE:
|
||||||
case TextureType::ARRAY_CUBE:
|
case TextureType::ARRAY_CUBE:
|
||||||
throw NotImplementedException("Illegal offset on CUBE sample");
|
throw NotImplementedException("Illegal offset on CUBE sample");
|
||||||
|
|
|
@ -106,17 +106,17 @@ IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) {
|
||||||
throw NotImplementedException("Invalid texture type {}", type);
|
throw NotImplementedException("Invalid texture type {}", type);
|
||||||
}
|
}
|
||||||
|
|
||||||
std::pair<IR::Value, IR::Value> MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) {
|
IR::Value MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) {
|
||||||
const IR::U32 value1{v.X(reg++)};
|
const IR::U32 value1{v.X(reg++)};
|
||||||
const IR::U32 value2{v.X(reg++)};
|
const IR::U32 value2{v.X(reg++)};
|
||||||
const auto getVector = ([&v](const IR::U32& value) {
|
const IR::U32 bitsize = v.ir.Imm32(6);
|
||||||
|
const auto getVector = ([&v, &bitsize](const IR::U32& value, u32 base) {
|
||||||
return v.ir.CompositeConstruct(
|
return v.ir.CompositeConstruct(
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
|
v.ir.BitFieldExtract(value, v.ir.Imm32(base + 0), bitsize, true),
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true),
|
v.ir.BitFieldExtract(value, v.ir.Imm32(base + 8), bitsize, true));
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true),
|
|
||||||
v.ir.BitFieldExtract(value, v.ir.Imm32(24), v.ir.Imm32(6), true));
|
|
||||||
});
|
});
|
||||||
return {getVector(value1), getVector(value2)};
|
return v.ir.CompositeConstruct(getVector(value1, 0), getVector(value1, 16),
|
||||||
|
getVector(value2, 0), getVector(value2, 16));
|
||||||
}
|
}
|
||||||
|
|
||||||
void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type,
|
void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type,
|
||||||
|
@ -155,7 +155,7 @@ void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetTy
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OffsetType::PTP: {
|
case OffsetType::PTP: {
|
||||||
std::tie(offset, offset2) = MakeOffsetPTP(v, meta_reg);
|
offset2 = MakeOffsetPTP(v, meta_reg);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -355,6 +355,17 @@ void FoldBranchConditional(IR::Inst& inst) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void FoldConstantComposite(IR::Inst& inst, size_t amount = 2) {
|
||||||
|
for (size_t i = 0; i < amount; i++) {
|
||||||
|
if (!inst.Arg(i).IsConstantContainer()) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
auto info{inst.Flags<IR::CompositeDecoration>()};
|
||||||
|
info.is_constant = true;
|
||||||
|
inst.SetFlags(info);
|
||||||
|
}
|
||||||
|
|
||||||
void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
||||||
switch (inst.Opcode()) {
|
switch (inst.Opcode()) {
|
||||||
case IR::Opcode::GetRegister:
|
case IR::Opcode::GetRegister:
|
||||||
|
@ -380,6 +391,13 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
||||||
case IR::Opcode::SelectF32:
|
case IR::Opcode::SelectF32:
|
||||||
case IR::Opcode::SelectF64:
|
case IR::Opcode::SelectF64:
|
||||||
return FoldSelect(inst);
|
return FoldSelect(inst);
|
||||||
|
case IR::Opcode::CompositeConstructU32x2:
|
||||||
|
case IR::Opcode::CompositeConstructF16x2:
|
||||||
|
case IR::Opcode::CompositeConstructF32x2:
|
||||||
|
case IR::Opcode::CompositeConstructF64x2:
|
||||||
|
return FoldConstantComposite(inst, 2);
|
||||||
|
case IR::Opcode::CompositeConstructArrayU32x2:
|
||||||
|
return FoldConstantComposite(inst, 4);
|
||||||
case IR::Opcode::FPMul32:
|
case IR::Opcode::FPMul32:
|
||||||
return FoldFPMul32(inst);
|
return FoldFPMul32(inst);
|
||||||
case IR::Opcode::LogicalAnd:
|
case IR::Opcode::LogicalAnd:
|
||||||
|
|
|
@ -30,6 +30,7 @@ struct Profile {
|
||||||
bool support_fp32_signed_zero_nan_preserve{};
|
bool support_fp32_signed_zero_nan_preserve{};
|
||||||
bool support_fp64_signed_zero_nan_preserve{};
|
bool support_fp64_signed_zero_nan_preserve{};
|
||||||
bool support_vote{};
|
bool support_vote{};
|
||||||
|
bool support_variadic_ptp{};
|
||||||
bool warp_size_potentially_larger_than_guest{};
|
bool warp_size_potentially_larger_than_guest{};
|
||||||
|
|
||||||
// FClamp is broken and OpFMax + OpFMin should be used instead
|
// FClamp is broken and OpFMax + OpFMin should be used instead
|
||||||
|
|
Loading…
Reference in a new issue