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https://gitlab.com/suyu-emu/suyu.git
synced 2024-03-15 23:15:44 +00:00
texture_cache: Correct premature texceptions
Due to our current infrastructure, it is possible for a mipmap to be set on as a render target before a texception of that mipmap's superset be set afterwards. This is problematic as we rely on texture views to set up texceptions and protecting render targets targets for 3D texture rendering. One simple solution is to configure framebuffers after texture setup but this brings other problems. This solution, forces a reconfiguration of the framebuffers after such event happens.
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@ -461,15 +461,15 @@ void RasterizerOpenGL::LoadDiskResources(const std::atomic_bool& stop_loading,
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}
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std::pair<bool, bool> RasterizerOpenGL::ConfigureFramebuffers(
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OpenGLState& current_state, bool using_color_fb, bool using_depth_fb, bool preserve_contents,
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std::optional<std::size_t> single_color_target) {
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OpenGLState& current_state, bool must_reconfigure, bool using_color_fb, bool using_depth_fb,
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bool preserve_contents, std::optional<std::size_t> single_color_target) {
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MICROPROFILE_SCOPE(OpenGL_Framebuffer);
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auto& gpu = system.GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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const FramebufferConfigState fb_config_state{using_color_fb, using_depth_fb, preserve_contents,
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single_color_target};
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if (fb_config_state == current_framebuffer_config_state &&
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if (!must_reconfigure && fb_config_state == current_framebuffer_config_state &&
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gpu.dirty_flags.color_buffer.none() && !gpu.dirty_flags.zeta_buffer) {
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// Only skip if the previous ConfigureFramebuffers call was from the same kind (multiple or
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// single color targets). This is done because the guest registers may not change but the
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@ -622,8 +622,9 @@ void RasterizerOpenGL::Clear() {
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return;
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}
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const auto [clear_depth, clear_stencil] = ConfigureFramebuffers(
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clear_state, use_color, use_depth || use_stencil, false, regs.clear_buffers.RT.Value());
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const auto [clear_depth, clear_stencil] =
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ConfigureFramebuffers(clear_state, false, use_color, use_depth || use_stencil, false,
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regs.clear_buffers.RT.Value());
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if (regs.clear_flags.scissor) {
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SyncScissorTest(clear_state);
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}
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@ -705,6 +706,10 @@ void RasterizerOpenGL::DrawArrays() {
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DrawParameters params = SetupDraw();
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SetupShaders(params.primitive_mode);
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if (texture_cache.ConsumeReconfigurationFlag()) {
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ConfigureFramebuffers(state, true);
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}
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buffer_cache.Unmap();
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shader_program_manager->ApplyTo(state);
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@ -101,6 +101,8 @@ private:
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/**
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* Configures the color and depth framebuffer states.
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* @param must_reconfigure If true, tells the framebuffer to skip the cache and reconfigure
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* again. Used by the texture cache to solve texception conflicts
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* @param use_color_fb If true, configure color framebuffers.
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* @param using_depth_fb If true, configure the depth/stencil framebuffer.
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* @param preserve_contents If true, tries to preserve data from a previously used framebuffer.
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@ -109,8 +111,9 @@ private:
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* (requires using_depth_fb to be true)
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*/
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std::pair<bool, bool> ConfigureFramebuffers(
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OpenGLState& current_state, bool use_color_fb = true, bool using_depth_fb = true,
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bool preserve_contents = true, std::optional<std::size_t> single_color_target = {});
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OpenGLState& current_state, bool must_reconfigure = false, bool use_color_fb = true,
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bool using_depth_fb = true, bool preserve_contents = true,
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std::optional<std::size_t> single_color_target = {});
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/// Configures the current constbuffers to use for the draw command.
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void SetupDrawConstBuffers(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
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@ -55,6 +55,11 @@ public:
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return (cache_addr < end) && (cache_addr_end > start);
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}
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bool IsInside(const GPUVAddr other_start, const GPUVAddr other_end) {
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const GPUVAddr gpu_addr_end = gpu_addr + guest_memory_size;
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return (gpu_addr <= other_start && other_end <= gpu_addr_end);
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}
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// Use only when recycling a surface
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void SetGpuAddr(const GPUVAddr new_addr) {
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gpu_addr = new_addr;
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@ -105,6 +110,12 @@ public:
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return params.target == target;
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}
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bool MatchesSubTexture(const SurfaceParams& rhs, const GPUVAddr other_gpu_addr) const {
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return std::tie(gpu_addr, params.target, params.num_levels) ==
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std::tie(other_gpu_addr, rhs.target, rhs.num_levels) &&
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params.target == SurfaceTarget::Texture2D && params.num_levels == 1;
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}
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bool MatchesTopology(const SurfaceParams& rhs) const {
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const u32 src_bpp{params.GetBytesPerPixel()};
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const u32 dst_bpp{rhs.GetBytesPerPixel()};
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@ -121,9 +132,9 @@ public:
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}
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// Tiled surface
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if (std::tie(params.height, params.depth, params.block_width, params.block_height,
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params.block_depth, params.tile_width_spacing) ==
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params.block_depth, params.tile_width_spacing, params.num_levels) ==
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std::tie(rhs.height, rhs.depth, rhs.block_width, rhs.block_height, rhs.block_depth,
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rhs.tile_width_spacing)) {
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rhs.tile_width_spacing, rhs.num_levels)) {
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if (params.width == rhs.width) {
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return MatchStructureResult::FullMatch;
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}
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@ -259,7 +270,7 @@ public:
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std::optional<TView> EmplaceView(const SurfaceParams& view_params, const GPUVAddr view_addr) {
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if (view_addr < gpu_addr || params.target == SurfaceTarget::Texture3D ||
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view_params.target == SurfaceTarget::Texture3D) {
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params.num_levels == 1 || view_params.target == SurfaceTarget::Texture3D) {
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return {};
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}
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const auto layer_mipmap{GetLayerMipmap(view_addr)};
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@ -120,6 +120,10 @@ public:
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return {};
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}
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if (regs.color_mask[index].raw == 0) {
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return {};
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}
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auto surface_view = GetSurface(gpu_addr, SurfaceParams::CreateForFramebuffer(system, index),
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preserve_contents);
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if (render_targets[index].target)
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@ -183,6 +187,12 @@ public:
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return ++ticks;
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}
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bool ConsumeReconfigurationFlag() {
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const bool result = force_reconfiguration;
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force_reconfiguration = false;
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return result;
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}
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protected:
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TextureCache(Core::System& system, VideoCore::RasterizerInterface& rasterizer)
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: system{system}, rasterizer{rasterizer} {
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@ -219,9 +229,10 @@ protected:
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rasterizer.UpdatePagesCachedCount(*cpu_addr, size, 1);
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}
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void Unregister(TSurface surface) {
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if (surface->IsProtected())
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void Unregister(TSurface surface, const bool force_unregister = false) {
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if (surface->IsProtected() && !force_unregister) {
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return;
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}
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const GPUVAddr gpu_addr = surface->GetGpuAddr();
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const CacheAddr cache_ptr = surface->GetCacheAddr();
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const std::size_t size = surface->GetSizeInBytes();
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@ -365,8 +376,10 @@ private:
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std::min(src_params.height, dst_height), 1);
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ImageCopy(surface, new_surface, copy_params);
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}
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force_reconfiguration = false;
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for (auto surface : overlaps) {
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Unregister(surface);
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force_reconfiguration |= surface->IsProtected();
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Unregister(surface, true);
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}
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Register(new_surface);
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return {{new_surface, new_surface->GetMainView()}};
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@ -379,6 +392,7 @@ private:
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const auto cache_addr{ToCacheAddr(host_ptr)};
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const std::size_t candidate_size = params.GetGuestSizeInBytes();
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auto overlaps{GetSurfacesInRegion(cache_addr, candidate_size)};
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if (overlaps.empty()) {
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return InitializeSurface(gpu_addr, params, preserve_contents);
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}
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@ -403,7 +417,7 @@ private:
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return RebuildSurface(current_surface, params);
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}
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}
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if (current_surface->GetSizeInBytes() <= candidate_size) {
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if (!current_surface->IsInside(gpu_addr, gpu_addr + candidate_size)) {
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return RecycleSurface(overlaps, params, gpu_addr, host_ptr, preserve_contents,
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false);
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}
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@ -530,6 +544,10 @@ private:
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u64 ticks{};
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// Sometimes Setup Textures can hit a surface that's on the render target, when this happens
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// we force a reconfiguration of the frame buffer after setup.
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bool force_reconfiguration;
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// The internal Cache is different for the Texture Cache. It's based on buckets
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// of 1MB. This fits better for the purpose of this cache as textures are normaly
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// large in size.
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