mirror of
https://gitlab.com/suyu-emu/suyu.git
synced 2024-03-15 23:15:44 +00:00
commit
487a80f9f7
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@ -58,7 +58,8 @@ void Config::ReadValues() {
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// Core
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Settings::values.cpu_core = glfw_config->GetInteger("Core", "cpu_core", Core::CPU_Interpreter);
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Settings::values.gpu_refresh_rate = glfw_config->GetInteger("Core", "gpu_refresh_rate", 60);
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Settings::values.gpu_refresh_rate = glfw_config->GetInteger("Core", "gpu_refresh_rate", 30);
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Settings::values.frame_skip = glfw_config->GetInteger("Core", "frame_skip", 0);
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// Data Storage
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Settings::values.use_virtual_sd = glfw_config->GetBoolean("Data Storage", "use_virtual_sd", true);
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@ -28,7 +28,8 @@ pad_sright =
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[Core]
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cpu_core = ## 0: Interpreter (default), 1: FastInterpreter (experimental)
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gpu_refresh_rate = ## 60 (default)
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gpu_refresh_rate = ## 30 (default)
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frame_skip = ## 0: No frameskip (default), 1 : 2x frameskip, 2 : 4x frameskip, etc.
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[Data Storage]
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use_virtual_sd =
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@ -44,7 +44,8 @@ void Config::ReadValues() {
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qt_config->beginGroup("Core");
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Settings::values.cpu_core = qt_config->value("cpu_core", Core::CPU_Interpreter).toInt();
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Settings::values.gpu_refresh_rate = qt_config->value("gpu_refresh_rate", 60).toInt();
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Settings::values.gpu_refresh_rate = qt_config->value("gpu_refresh_rate", 30).toInt();
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Settings::values.frame_skip = qt_config->value("frame_skip", 0).toInt();
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qt_config->endGroup();
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qt_config->beginGroup("Data Storage");
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@ -80,6 +81,7 @@ void Config::SaveValues() {
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qt_config->beginGroup("Core");
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qt_config->setValue("cpu_core", Settings::values.cpu_core);
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qt_config->setValue("gpu_refresh_rate", Settings::values.gpu_refresh_rate);
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qt_config->setValue("frame_skip", Settings::values.frame_skip);
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qt_config->endGroup();
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qt_config->beginGroup("Data Storage");
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@ -21,10 +21,14 @@ namespace GPU {
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Regs g_regs;
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static u64 frame_ticks = 0; ///< 268MHz / 60 frames per second
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static u32 cur_line = 0; ///< Current vertical screen line
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static u64 last_frame_ticks = 0; ///< CPU tick count from last frame
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static u64 last_update_tick = 0; ///< CPU ticl count from last GPU update
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bool g_skip_frame = false; ///< True if the current frame was skipped
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static u64 frame_ticks = 0; ///< 268MHz / gpu_refresh_rate frames per second
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static u64 line_ticks = 0; ///< Number of ticks for a screen line
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static u32 cur_line = 0; ///< Current screen line
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static u64 last_update_tick = 0; ///< CPU ticl count from last GPU update
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static u64 frame_count = 0; ///< Number of frames drawn
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static bool last_skip_frame = false; ///< True if the last frame was skipped
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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@ -178,38 +182,40 @@ template void Write<u8>(u32 addr, const u8 data);
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void Update() {
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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// Update the frame after a certain number of CPU ticks have elapsed. This assumes that the
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// active frame in memory is always complete to render. There also may be issues with this
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// becoming out-of-synch with GSP synchrinization code (as follows). At this time, this seems to
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// be the most effective solution for both homebrew and retail applications. With retail, this
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// could be moved below (and probably would guarantee more accurate synchronization). However,
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// primitive homebrew relies on a vertical blank interrupt to happen inevitably (regardless of a
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// threading reschedule).
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if ((Core::g_app_core->GetTicks() - last_frame_ticks) > (GPU::frame_ticks)) {
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VideoCore::g_renderer->SwapBuffers();
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last_frame_ticks = Core::g_app_core->GetTicks();
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}
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// Synchronize GPU on a thread reschedule: Because we cannot accurately predict a vertical
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// blank, we need to simulate it. Based on testing, it seems that retail applications work more
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// accurately when this is signalled between thread switches.
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if (HLE::g_reschedule) {
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u64 current_ticks = Core::g_app_core->GetTicks();
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u64 line_ticks = (GPU::frame_ticks / framebuffer_top.height) * 16;
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u32 num_lines = static_cast<u32>((current_ticks - last_update_tick) / line_ticks);
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//// Synchronize line...
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if ((current_ticks - last_update_tick) >= line_ticks) {
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// Synchronize line...
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if (num_lines > 0) {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PDC0);
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cur_line++;
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last_update_tick += line_ticks;
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cur_line += num_lines;
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last_update_tick += (num_lines * line_ticks);
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}
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// Synchronize frame...
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if (cur_line >= framebuffer_top.height) {
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cur_line = 0;
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VideoCore::g_renderer->SwapBuffers();
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frame_count++;
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last_skip_frame = g_skip_frame;
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g_skip_frame = (frame_count & Settings::values.frame_skip) != 0;
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// Swap buffers based on the frameskip mode, which is a little bit tricky. When
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// a frame is being skipped, nothing is being rendered to the internal framebuffer(s).
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// So, we should only swap frames if the last frame was rendered. The rules are:
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// - If frameskip == 0 (disabled), always swap buffers
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// - If frameskip == 1, swap buffers every other frame (starting from the first frame)
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// - If frameskip > 1, swap buffers every frameskip^n frames (starting from the second frame)
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if ((((Settings::values.frame_skip != 1) ^ last_skip_frame) && last_skip_frame != g_skip_frame) ||
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Settings::values.frame_skip == 0) {
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VideoCore::g_renderer->SwapBuffers();
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}
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PDC1);
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}
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}
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@ -217,10 +223,6 @@ void Update() {
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/// Initialize hardware
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void Init() {
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frame_ticks = 268123480 / Settings::values.gpu_refresh_rate;
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cur_line = 0;
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last_update_tick = last_frame_ticks = Core::g_app_core->GetTicks();
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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auto& framebuffer_sub = g_regs.framebuffer_config[1];
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@ -249,6 +251,13 @@ void Init() {
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framebuffer_sub.color_format = Regs::PixelFormat::RGB8;
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framebuffer_sub.active_fb = 0;
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frame_ticks = 268123480 / Settings::values.gpu_refresh_rate;
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line_ticks = (GPU::frame_ticks / framebuffer_top.height);
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cur_line = 0;
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last_update_tick = Core::g_app_core->GetTicks();
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last_skip_frame = false;
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g_skip_frame = false;
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LOG_DEBUG(HW_GPU, "initialized OK");
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}
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@ -241,6 +241,7 @@ ASSERT_REG_POSITION(command_processor_config, 0x00638);
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static_assert(sizeof(Regs) == 0x1000 * sizeof(u32), "Invalid total size of register set");
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extern Regs g_regs;
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extern bool g_skip_frame;
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template <typename T>
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void Read(T &var, const u32 addr);
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@ -31,6 +31,7 @@ struct Values {
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// Core
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int cpu_core;
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int gpu_refresh_rate;
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int frame_skip;
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// Data Storage
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bool use_virtual_sd;
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@ -9,6 +9,7 @@
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#include "primitive_assembly.h"
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#include "vertex_shader.h"
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#include "core/hle/service/gsp_gpu.h"
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#include "core/hw/gpu.h"
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#include "debug_utils/debug_utils.h"
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@ -31,6 +32,10 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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if (id >= registers.NumIds())
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return;
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// If we're skipping this frame, only allow trigger IRQ
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if (GPU::g_skip_frame && id != PICA_REG_INDEX(trigger_irq))
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return;
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// TODO: Figure out how register masking acts on e.g. vs_uniform_setup.set_value
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u32 old_value = registers[id];
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registers[id] = (old_value & ~mask) | (value & mask);
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