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video_core/engines: Make memory manager members private
These aren't used externally by anything, so they can be made private data members.
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@ -12,7 +12,7 @@
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namespace Tegra::Engines {
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Fermi2D::Fermi2D(VideoCore::RasterizerInterface& rasterizer, MemoryManager& memory_manager)
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: memory_manager(memory_manager), rasterizer{rasterizer} {}
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: rasterizer{rasterizer}, memory_manager{memory_manager} {}
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void Fermi2D::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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@ -118,10 +118,9 @@ public:
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};
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} regs{};
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MemoryManager& memory_manager;
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private:
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VideoCore::RasterizerInterface& rasterizer;
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MemoryManager& memory_manager;
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/// Performs the copy from the source surface to the destination surface as configured in the
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/// registers.
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@ -43,10 +43,11 @@ public:
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static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32),
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"KeplerCompute Regs has wrong size");
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MemoryManager& memory_manager;
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/// Write the value to the register identified by method.
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void CallMethod(const GPU::MethodCall& method_call);
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private:
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MemoryManager& memory_manager;
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};
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#define ASSERT_REG_POSITION(field_name, position) \
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@ -15,7 +15,7 @@ namespace Tegra::Engines {
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KeplerMemory::KeplerMemory(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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MemoryManager& memory_manager)
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: system{system}, memory_manager(memory_manager), rasterizer{rasterizer} {}
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager} {}
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KeplerMemory::~KeplerMemory() = default;
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@ -85,8 +85,8 @@ public:
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private:
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Core::System& system;
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MemoryManager& memory_manager;
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VideoCore::RasterizerInterface& rasterizer;
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MemoryManager& memory_manager;
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void ProcessData(u32 data);
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};
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@ -20,8 +20,8 @@ constexpr u32 MacroRegistersStart = 0xE00;
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Maxwell3D::Maxwell3D(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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MemoryManager& memory_manager)
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: memory_manager(memory_manager), system{system}, rasterizer{rasterizer},
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macro_interpreter(*this) {
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager}, macro_interpreter{
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*this} {
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InitializeRegisterDefaults();
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}
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@ -1096,7 +1096,6 @@ public:
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};
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State state{};
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MemoryManager& memory_manager;
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struct DirtyFlags {
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std::bitset<8> color_buffer{0xFF};
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@ -1144,6 +1143,8 @@ private:
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VideoCore::RasterizerInterface& rasterizer;
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MemoryManager& memory_manager;
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/// Start offsets of each macro in macro_memory
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std::unordered_map<u32, u32> macro_offsets;
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@ -16,7 +16,7 @@ namespace Tegra::Engines {
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MaxwellDMA::MaxwellDMA(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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MemoryManager& memory_manager)
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: memory_manager(memory_manager), system{system}, rasterizer{rasterizer} {}
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: system{system}, rasterizer{rasterizer}, memory_manager{memory_manager} {}
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void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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@ -142,13 +142,13 @@ public:
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};
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} regs{};
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MemoryManager& memory_manager;
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private:
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Core::System& system;
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VideoCore::RasterizerInterface& rasterizer;
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MemoryManager& memory_manager;
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/// Performs the copy from the source buffer to the destination buffer as configured in the
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/// registers.
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void HandleCopy();
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