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shader: Fix tracking
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parent
1b0cf2309c
commit
1c0b8bca5e
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@ -142,6 +142,58 @@ void DiscardGlobalMemory(IR::Block& block, IR::Block::iterator inst) {
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}
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}
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struct LowAddrInfo {
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IR::U32 value;
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s32 imm_offset;
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};
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/// Tries to track the first 32-bits of a global memory instruction
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std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
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// The first argument is the low level GPU pointer to the global memory instruction
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const IR::U64 addr{inst->Arg(0)};
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if (addr.IsImmediate()) {
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// Not much we can do if it's an immediate
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return std::nullopt;
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}
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// This address is expected to either be a PackUint2x32 or a IAdd64
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IR::Inst* addr_inst{addr.InstRecursive()};
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s32 imm_offset{0};
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if (addr_inst->Opcode() == IR::Opcode::IAdd64) {
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// If it's an IAdd64, get the immediate offset it is applying and grab the address
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// instruction. This expects for the instruction to be canonicalized having the address on
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// the first argument and the immediate offset on the second one.
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const IR::U64 imm_offset_value{addr_inst->Arg(1)};
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if (!imm_offset_value.IsImmediate()) {
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return std::nullopt;
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}
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imm_offset = static_cast<s32>(static_cast<s64>(imm_offset_value.U64()));
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const IR::U64 iadd_addr{addr_inst->Arg(0)};
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if (iadd_addr.IsImmediate()) {
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return std::nullopt;
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}
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addr_inst = iadd_addr.Inst();
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}
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// With IAdd64 handled, now PackUint2x32 is expected without exceptions
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if (addr_inst->Opcode() != IR::Opcode::PackUint2x32) {
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return std::nullopt;
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}
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// PackUint2x32 is expected to be generated from a vector
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const IR::Value vector{addr_inst->Arg(0)};
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if (vector.IsImmediate()) {
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return std::nullopt;
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}
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// This vector is expected to be a CompositeConstructU32x2
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IR::Inst* const vector_inst{vector.InstRecursive()};
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if (vector_inst->Opcode() != IR::Opcode::CompositeConstructU32x2) {
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return std::nullopt;
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}
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// Grab the first argument from the CompositeConstructU32x2, this is the low address.
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return LowAddrInfo{
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.value{IR::U32{vector_inst->Arg(0)}},
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.imm_offset{imm_offset},
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};
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}
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/// Recursively tries to track the storage buffer address used by a global memory instruction
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std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias) {
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if (value.IsImmediate()) {
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@ -191,13 +243,26 @@ void CollectStorageBuffers(IR::Block& block, IR::Block::iterator inst,
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};
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// First try to find storage buffers in the NVN address
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const IR::U64 addr{inst->Arg(0)};
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std::optional<StorageBufferAddr> storage_buffer{Track(addr, &nvn_bias)};
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if (addr.IsImmediate()) {
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// Immediate addresses can't be lowered to a storage buffer
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DiscardGlobalMemory(block, inst);
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return;
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}
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// Track the low address of the instruction
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const std::optional<LowAddrInfo> low_addr_info{TrackLowAddress(addr.InstRecursive())};
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if (!low_addr_info) {
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DiscardGlobalMemory(block, inst);
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return;
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}
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const IR::U32 low_addr{low_addr_info->value};
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std::optional<StorageBufferAddr> storage_buffer{Track(low_addr, &nvn_bias)};
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if (!storage_buffer) {
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// If it fails, track without a bias
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storage_buffer = Track(addr, nullptr);
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storage_buffer = Track(low_addr, nullptr);
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if (!storage_buffer) {
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// If that also failed, drop the global memory usage
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DiscardGlobalMemory(block, inst);
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return;
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}
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}
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// Collect storage buffer and the instruction
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@ -208,58 +273,15 @@ void CollectStorageBuffers(IR::Block& block, IR::Block::iterator inst,
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});
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}
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/// Tries to track the first 32-bits of a global memory instruction
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std::optional<IR::U32> TrackLowAddress(IR::IREmitter& ir, IR::Inst* inst) {
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// The first argument is the low level GPU pointer to the global memory instruction
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const IR::U64 addr{inst->Arg(0)};
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if (addr.IsImmediate()) {
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// Not much we can do if it's an immediate
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return std::nullopt;
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}
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// This address is expected to either be a PackUint2x32 or a IAdd64
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IR::Inst* addr_inst{addr.InstRecursive()};
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s32 imm_offset{0};
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if (addr_inst->Opcode() == IR::Opcode::IAdd64) {
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// If it's an IAdd64, get the immediate offset it is applying and grab the address
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// instruction. This expects for the instruction to be canonicalized having the address on
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// the first argument and the immediate offset on the second one.
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const IR::U64 imm_offset_value{addr_inst->Arg(1)};
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if (!imm_offset_value.IsImmediate()) {
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return std::nullopt;
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}
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imm_offset = static_cast<s32>(static_cast<s64>(imm_offset_value.U64()));
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const IR::U64 iadd_addr{addr_inst->Arg(0)};
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if (iadd_addr.IsImmediate()) {
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return std::nullopt;
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}
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addr_inst = iadd_addr.Inst();
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}
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// With IAdd64 handled, now PackUint2x32 is expected without exceptions
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if (addr_inst->Opcode() != IR::Opcode::PackUint2x32) {
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return std::nullopt;
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}
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// PackUint2x32 is expected to be generated from a vector
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const IR::Value vector{addr_inst->Arg(0)};
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if (vector.IsImmediate()) {
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return std::nullopt;
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}
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// This vector is expected to be a CompositeConstructU32x2
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IR::Inst* const vector_inst{vector.InstRecursive()};
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if (vector_inst->Opcode() != IR::Opcode::CompositeConstructU32x2) {
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return std::nullopt;
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}
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// Grab the first argument from the CompositeConstructU32x2, this is the low address.
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// Re-apply the offset in case we found one.
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const IR::U32 low_addr{vector_inst->Arg(0)};
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return imm_offset != 0 ? IR::U32{ir.IAdd(low_addr, ir.Imm32(imm_offset))} : low_addr;
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}
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/// Returns the offset in indices (not bytes) for an equivalent storage instruction
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IR::U32 StorageOffset(IR::Block& block, IR::Block::iterator inst, StorageBufferAddr buffer) {
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IR::IREmitter ir{block, inst};
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IR::U32 offset;
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if (const std::optional<IR::U32> low_addr{TrackLowAddress(ir, &*inst)}) {
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offset = *low_addr;
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if (const std::optional<LowAddrInfo> low_addr{TrackLowAddress(&*inst)}) {
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offset = low_addr->value;
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if (low_addr->imm_offset != 0) {
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offset = ir.IAdd(offset, ir.Imm32(low_addr->imm_offset));
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}
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} else {
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offset = ir.ConvertU(32, IR::U64{inst->Arg(0)});
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}
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